该职位来源于猎聘 Summary
We are looking to onboard a high performance FPGA IP engineer for FW development.
This engineer will work closely with other engineers from HWTE teams and multi-functional teams from worldwide. He/She will also review Vendor/Contract IP programming to accomplish IP development and issue triage. Description
You will be working on an innovative platform and join a creative and passionate HW/FW developer team to be part of great innovation and excellence. You will be working on an advanced in-house design of embedded system as instrumentation controller built with Xilinx Zynq SoC. The FPGA IP engineer will be in charge of developing and validating customized IPs, and also expected to provide support to project team when on-the-field issues occur. The candidate needs to have profound experience on IP development, with good understanding of Verilog HDL programming and HW design.
Job Scope Will Be Part Of Below Description
- Work closely with hardware architects and system engineers to define IP requirements
- Design, develop, and verify FPGA-based IP cores for internal customized applications in Verilog/VHDL
- Develop testbenches and simulation environments for functional verification
- Optimize IP for area, speed, and power based on application constraints
- Perform simulation, synthesis, place-and-route, and timing closure
- Integrate IP cores into larger FPGA or SoC systems using standard bus protocols
- Debug hardware using simulation tools, logic analyzers, and in-system debugging tools
- Maintain and enhance a reusable library of IP blocks with clear versioning and documentation
- Support FPGA bring-up, lab validation, and system-level testing
- Collaborate with software and firmware teams to ensure seamless integration
- Design and Validation documentation with presentation in enterprise environment.
- Vendor IP review and guidance
Qualifications
- BS EE/CS/CE or above
- Minimum 3 years of relevant work experience as IP developer, preferably on platform development, data acquisition, instrumentation development
- Proficiency in Verilog HDL programming, synthesis, place&route, simulation, timing constraint and performance optimization.
- Proficient in using FPGA development tools (Vivado, Quartus, ModelSim, Synplify, etc).
- Knowledge of AXI, Avalon, Wishbone, or other standard IP interfaces.
- Experience with testbench creation, and debugging and have strong problem solving skills.
- Ability to write clear documentation for IP cores and user interfaces.
- Experienced in logic design of digital I/O protocol, FSM, DSP etc..
- Familiar with USB, SPI/I2C, SWD, UART, Serdes, FIR.
- Familiar with any mainstream programming/script language (C/Python).
- Familiar with version control system (git or SVN).
- Adequate written and verbal Chinese/English skill.
- Fast learner and innovative.
- Self-driven and passionate. Able to perform under tight schedule. Preferred
- Understanding of embedded systems, SoC, or hardware/software co-design.
- Experience of Xilinx Zynq or Intel Altera SoC platform development.
- Experience of SystemVerilog and UVM for FPGA simulation.
- Experience of C++ programming