返回查询:SOC Design / 上海

We are looking for an experienced SOC (System-on-Chip) Design Leader with over 10+ years' hands-on experience

managing and leading SOC teams and a strong understanding of design flows. This leader will drive technical strategy, oversee integration of complex silicon solutions for Cadence customers, mentor multi-disciplinary teams, and ensure high standards in technical execution.

Key Responsibilities

·       Lead and mentor SOC designers and verification engineers across projects.

·       Manage all phases of SOC design: microarchitecture, RTL coding, integration, and reviews.

·       Collaborate with verification teams to ensure design intent, testability, and coverage; address complex debug issues.

·       Work closely with customer and internal engineering teams to deliver seamless service and support.

·       Interface with executive management, customers, and partners to align technical vision with business goals.

·       Improve SOC processes, tools, and methods to boost productivity and quality.

·       Oversee project schedules, resource allocation, and risk management.

·       Identify risks early and develop mitigation strategies.

Required Qualifications

·       Bachelor's/Master's in Electrical/Computer Engineering or related field.

· years in digital SOC design, with significant leadership experience.

·       Expertise in SOC integration, RTL, synthesis, timing closure, physical implementation.

·       Proven record leading complex projects and high-performance teams.

·       Practical knowledge of verification environments and requirements.

·       Experience integrating third-party IP, developing custom blocks, and managing deliverables.

·       Strong problem-solving and debugging skills at design and system level.

·       Proficient with industry-standard EDA tools.

·       Project management skills, including planning and risk mitigation.

·       Excellent English communication skills, able to explain technical concepts clearly.

·       Experience in multicultural, multi-site teams.

·       Familiarity with physical design, DFT, post-silicon debug, and system architecture.

·       Team-oriented, promotes innovation and conflict resolution.

·       Adaptable to fast-paced, shifting environments.

This role may involve travel to customer sites within China, as well as travel to India to collaborate with extended engineering teams.